基于Cell矩阵的SpaceWire无阻塞路由器设计及验证  

Achievement and Validation of SpaceWire Non-Blocking Routers Based on Optimized Cell Matrix Method

作　　者：钟雪燕[1] 姚睿[1] 鲍小胜[1] 

机构地区：[1]南京航空航天大学自动化学院,南京210016

出　　处：《计算机测量与控制》2013年第3期690-693,共4页Computer Measurement &Control

基　　金：国家自然科学基金(60871009);南京航空航天大学基本科研业务费专项科研项目(NN2012088)

摘　　要：为满足航天器有效载荷间高速数据多路传输的未来发展需求,对基于SpaceWire总线协议的星载数据路由的设计方案进行了研究;在SpaceWire总线标准网络层分析的基础上,提出了基于输出端口错位和时间片循环调度的cell矩阵的无阻塞路由,通过Cell矩阵输出端错位以及时间片循环调度的方法来避免输入端口和输出端口优先级的判别,以此简化算法,减少硬件开支和缩短时间延时,同时在Virtex-5FX开发板上搭建了硬件平台,进行了整个系统的验证,软核的频率能够达到75MHz。In order to meet the needs of high--speed multiplexing of data in aerospace applications, a design of on--board data routing based on SpaceWire protocol is studied. Based on the cell matrix non--blocking routing, a new non--blocking design in the manner of dislo cared the output ports and round robin scheduling of the time slice is put forward after a network level analysis of SpaceWire protocol. It will simplify the algorithm and cut clown the hardware costs and time delay by avoiding the discrimination of the priority of the input ports and output ports in this manner. Hardware platform of the system is built on the Virtex--5 FX development board and the design is verified on the board. The frequency of the soft core can reach 75MHz.

关 键 词：星载网络 路由算法 SpaceWire路由器 FPGA 

分 类 号：V443.1[航空宇航科学与技术—飞行器设计]