L/S/C波段低相噪、单片锁相频率源实现  

Design of L/S/C Band Low Phase Noise Monolithic Phase-Locked Frequency Source

作　　者：刘余[1] 冯晓东[1] 

机构地区：[1]重庆邮电大学电信业务支撑系统研究所,重庆400065

出　　处：《电子科技》2013年第4期110-112,共3页Electronic Science and Technology

摘　　要：介绍一种在20 mm×20 mm PCB上实现L/S/C波段频率源的方法,当频率最高达4 820 MHz时,相位噪声达到-100 dBc/Hz@10 kHz。当步进设为2 MHz,环路带宽为100 kHz时,杂波抑制>40 dBc,跳频时间<200μs;环路带宽为40 kHz时,杂波抑制>60 dBc,跳频时间<600μs。可以应用于一些低端的接收机和校正源上,或是对杂散抑制要求不高的射频通信中。This paper introduces an L/S/C band frequency source implement on a area of 20 mm x 20 mm PCB. At a frequency up to 4 820 MHz, the phase noise reaches - 100 dBcVHz@ 10 kHz. If the step is set to 2MHz, at a loop bandwidth of 100 kHz, the clutter suppression is greater than 40 dBc and the frequency hopping time less than 200 p,s; at a loop bandwidth of 40 kHz, the clutter suppression is greater than 60 dBc and the fre- quency hopping time less than 600 p,s. This design can be applied in some low-end receiver and calibration source and in the radio frequency communication when spurious suppression was not seen as important.

关 键 词：低相噪 频率源 HMC839LPCE VCO PLL 

分 类 号：TN742[电子电信—电路与系统]