A low leakage power-rail ESD detection circuit with a modified RC network for a 90-nm CMOS process  

作　　者：杨兆年 刘红侠 王树龙 

机构地区：[1]Key Laboratory of Wide Bandgap Semiconductor Materials and Devices of Ministry of Education,School of Microelectronics,Xidian University

出　　处：《Journal of Semiconductors》2013年第4期116-120,共5页半导体学报（英文版）

基　　金：Project supported by the National Natural Science Foundation of China(Nos.61076097,60936005);the Cultivation Fund of the Key Scientific and Technical Innovation Project,Ministry of Education of China Program(No.20110203110012)

摘　　要：An electrostatic discharge （ESD） detection circuit with a modified RC network for a 90-nm process clamp circuit is proposed. The leakage current is reduced to 4.6 nA at 25 ℃. Under the ESD event, it injects a 38.7 mA trigger current into the P-substrate to trigger SCR, and SCR can be turned on the discharge of the ESD energy. The capacitor area used is only 4.2 μm2. The simulation result shows that the proposed circuit can save power consumption and layout area when achieving the same trigger efficiency, compared with the previous circuits.An electrostatic discharge （ESD） detection circuit with a modified RC network for a 90-nm process clamp circuit is proposed. The leakage current is reduced to 4.6 nA at 25 ℃. Under the ESD event, it injects a 38.7 mA trigger current into the P-substrate to trigger SCR, and SCR can be turned on the discharge of the ESD energy. The capacitor area used is only 4.2 μm2. The simulation result shows that the proposed circuit can save power consumption and layout area when achieving the same trigger efficiency, compared with the previous circuits.

关 键 词：clamp circuit electrostatic discharge leakage current RC network 

分 类 号：TN432[电子电信—微电子学与固体电子学]