一种自适应基带系统的FPGA设计及性能评估  

Design and Performance Evaluation of FPGA for Adaptive Base-band Processing System

作　　者：韩东升[1] 杨维[1,2] 余绪梅 

机构地区：[1]北京交通大学轨道交通控制与安全国家重点实验室,北京100044 [2]东南大学移动通信国家重点实验室,南京210096

出　　处：《系统仿真学报》2013年第5期1024-1030,共7页Journal of System Simulation

基　　金：国家科技支撑计划资助项目(2013BAK06B03);国家自然科学基金资助项目(51274018)

摘　　要：提出了一种V-BLAST MIMO MC-CDMA自适应基带系统在现场可编程门阵列(FieldProgrammable Gate Array,FPGA)开发平台上的设计方案。采用verilog硬件描述语言在赛灵思(Xilinx)Virtex4-VC4VSX55 FPGA开发板上实现了4发5收的V-BLAST MC-CDMA自适应基带系统。通过仿真评估了系统的误码率和资源利用情况,验证了系统误码性能良好且配置灵活,效率高,对下一代原型移动通信系统的开发具有一定的借鉴价值。A new design of Vertical-Bell Laboratories Layered Space-Time Multiple-Input Multiple- Output Multi-Code Division Multiple Access （V-BLAST MIMO MC-CDMA） adaptive base-band system based on FPGA was proposed. By using a verilog hardware description language, a specific V-BLAST MC-CDMA adaptive base-band system, with four transmitting antennas and five receiving antennas was designed and simulated in Xilinx Virtex4-VC4VSX55 test-bed. The BER performance of the given system and the utilization of the chip resource were evaluated. Simulation results show that the system proposed has good BER performance, flexible configuration and high efficiency which are valuable for the development of prototype system of next ~eneration mobile communication.

关 键 词：现场可编程门阵列 多载波CDMA 垂直 分层空时码 自适应调制 误码率 

分 类 号：TN911.22[电子电信—通信与信息系统]