视频目标检测跟踪程序在多核DSP上的并行实现  

Realization of video target detecting and tracking procedures in parallel on multi-core DSP

作　　者：陈钰[1] 卿粼波[1] 杨龙[1] 何小海[1] 

机构地区：[1]四川大学电子信息学院图像信息研究所,四川成都610065

出　　处：《太赫兹科学与电子信息学报》2013年第2期266-270,共5页Journal of Terahertz Science and Electronic Information Technology

基　　金：国家自然科学基金(61201388);高等学校博士学科点专项科研基金资助项目(20110181120009)

摘　　要：高性能多核DSP的通信以及并行执行是多核系统设计的关键。文章分析了视频目标跟踪算法各模块的资源消耗,对各部分算法提出了并行计算的思路;提出改进的二值化掩膜法提取背景图像;提出辅助并行结构以使负载均衡;研究了DSP多核通信的进程间通信(IPC)同步机制,运用流水线并行结构,实现三核同步并行处理系统。通过实验,测试了通信延迟时间,并把目标跟踪程序合理地划分到3个DSP核中,实现并行处理,达到了实时性要求。The communication and parallel-executing of the high-performance multi-core DSP is the key to the multi-core system design. The resource consumption is analyzed for each module of the video object tracking algorithm, and the idea of parallel computing is proposed for each part of the algorithm. The improved Binary-Mask algorithm is proposed to extract the background image; and the proposed auxiliary parallel architecture can realize the load-balance. The Inter Processor Communication（IPC） synchronization mechanisms are researched for DSP muhi-core communication. The three-core parallel processing system is realized with pipelined parallel architecture. The communication delay time is tested by experiment, and target tracking program is divided into three DSP cores for parallel processing , which can achieve real-time requirement.

关 键 词：TMS320C6474模块 目标识别 二值化掩膜 IPC机制 负载均衡 多核通信 

分 类 号：TP391.41[自动化与计算机技术—计算机应用技术]