软件流水循环缓冲的设计与实现  

Design and Implementation of Software Pipelined Loop Buffer

作　　者：陈纪孝[1] 李勇[1] 

机构地区：[1]国防科学技术大学计算机学院,长沙410073

出　　处：《计算机科学》2013年第4期35-37,共3页Computer Science

摘　　要：设计了一种软件流水循环缓冲,用于存储和派发循环体指令,减少执行循环程序时的访存次数,从而减少访存延迟对性能的影响。在详细研究软件流水和循环展开的基础上,完成了软件流水循环缓冲的设计。所设计的循环缓冲可以存储112条32位指令,用循环专用指令来控制循环程序的执行。对设计进行了模拟验证,并用Design Com-plier对设计进行了综合。One of software pipelined loop buffer was designed.It is used to store and dispatch instructions of loop body,reduce the times of accessing memory when executing loop programs,thereby reducing the influence of memory access latency on performance.Based on the study of software pipeling and loop unrolling,the design of software pipelined loop buffer was finished.The loop buffer has storage for up to 112 32-bit instructions.The special instructions of loop buffer are used to control the operation of loop programs.Numerical simulation was performed for the design.Using the design complier,analysis was also conducted for the design.

关 键 词：软件流水 循环缓冲 模调度 储存延迟 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]