硬件事务存储系统研究综述  

Hardware Transactional Memory System

作　　者：王永会[1] 张鑫伟[1] 刘轶[1] 

机构地区：[1]北京航空航天大学计算机学院中德联合软件技术研究所

出　　处：《小型微型计算机系统》2013年第5期1126-1131,共6页Journal of Chinese Computer Systems

基　　金：国家自然科学基金项目(61133004)资助;国家"八六三"高技术研究发展计划项目(2011AA01A205)资助

摘　　要：随着多核处理器的发展,硬件平台已经提供了充裕的并行能力,这对软件并行编程提出了更高的要求.传统的基于锁机制的并行编程模型存在着诸多难题.借鉴数据库中事务的思想,人们提出事务存储,旨在提供一种可编程性良好的同步手段.硬件事务存储快速有效的优势使之成为研究的热点.阐述了事务存储的基本概念、执行模型和编程接口.介绍了硬件事务存储系统的三大核心内容,对比了两种典型的硬件事务存储系统.分析讨论了目前硬件事务存储系统研究的热点和难点问题.最后介绍了硬件事务存储研究的平台和测试程序.The development of multi-core processor brings large amount of hardware parallelism for the software, which puts forward higher requirements for the software parallel programming technique. The traditional parallel programming is based on the lock mechanism, but there exists many problems. Transactional memory proposed to improve the programmability is thought as the most promising parallel programming mechanism. Hardware transactional memory is attractive because it＇s fast and highly efficient. The paper describes the basic concept, execution model and programming interface of transactional memory. Three main functions of hardware transactional memory are introduced and two typical hardware transactional memory systems are shown. The hot research fields and challenges of hardware transactional memory systems are discussed. Finally, a few research platforms and benchmarck workloads are introduced.

关 键 词：事务存储 硬件事务存储 并行编程 多核处理器 

分 类 号：TP301[自动化与计算机技术—计算机系统结构]