基于字典压缩的TTA架构处理器代码压缩研究  

Study on Code Compression for TTA-Based Processors Using Dictionary Compression

作　　者：孙桂玲[1] 杨长锐[1] 党卫[1] 冯硕[1] 

机构地区：[1]南开大学信息技术科学学院,天津300071

出　　处：《微电子学》2013年第2期238-241,273,共5页Microelectronics

基　　金：国家自然科学基金资助项目(61171140)

摘　　要：为了有效减小程序代码尺寸、节省芯片设计面积,以一种采用Verilog HDL硬件描述语言的自主设计传输触发架构(TTA)微处理器为目标内核,研究并实现了用字典压缩算法对程序代码进行压缩和解压缩。根据TTA架构微处理器内核的特点,在不同压缩粒度上对代码压缩进行优化,并对经典的LZ78字典压缩算法进行代码压缩应用方面的改进。测试结果表明,优化的字典压缩算法改善了代码压缩效果。采用考虑字典大小的代码压缩率评估方法,实现了代码压缩率的有效评估。In order to effectively reduce code size and save chip area,compression and decompression procedures were performed using dictionary compression algorithm.In this study,the target microprocessor was a self-developed processor core with transport triggered architecture（TTA） implemented by Verilog HDL hardware description language.Based on characteristics of TTA-based processor,code compression was optimized on different compression granularities,and improvements were made on code compression using classic LZ78 dictionary compression algorithm.It has been shown that the optimized algorithm improved the efficiency of code compression.And the code compression was evaluated more effectively by using evaluation method with dictionary size taken into consideration.

关 键 词：字典压缩算法 传输触发架构 代码压缩 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]