基于基地址寄存器映射的数据缓存研究  

Data Buffer Research Based on Base Address Register Mapping

作　　者：沈秀红[1] 赵朝君[1] 孟建熠[1] 项晓燕[1] 

机构地区：[1]浙江大学超大规模集成电路设计研究所,杭州310027

出　　处：《计算机工程》2013年第5期73-77,共5页Computer Engineering

摘　　要：针对深流水线中加载指令的延时长和功耗高的问题,提出一种基于基地址寄存器映射的数据缓存访问方法。该方法在加载指令执行过程中,动态构建基地址寄存器与目标数据的局部性访问历史,并通过设计基地址寄存器跟踪缓存器,在指令译码后直接获得目标数据,从而加速加载指令的数据获取过程,减少地址计算和对高速缓存的访问。测试结果表明,该方法的处理器性能平均提高约3.7%,数据高速缓存功耗平均降低约18.7%。Aiming at the problem of load latency and power consumption in deep pipeline, this paper proposes a method of getting data immediately which is based on base address register. Building locality accessing history between base address register and destination data dynarnically during the execution of load instruction, and designing a base address register tracking buffer, which let load instruction get data immediately at decode stage. This method accelerates the speed of load instruction to get destination data, and avoids address calculating and cache accessing. Results of benchmark show that performance of processor with this method increases about 3.7% averagely, and data cache power reduces about 18.7% averagely.

关 键 词：映射关系 基地址寄存器映射 内存访问局部性 数据一致性 高速缓存 

分 类 号：TP311[自动化与计算机技术—计算机软件与理论]