超高速并行滤波结构FIR的FPGA实现及应用  

Realization and Application of High Speed Parallel Filter Structure in FPGA

作　　者：张峻涛[1] 王平[1] 傅石雨[1] 

机构地区：[1]中国电子科技集团公司第三十六研究所,浙江嘉兴314033

出　　处：《通信对抗》2013年第1期36-39,共4页Communication Countermeasures

摘　　要：首先简要介绍传统数字滤波结构的实现方式;其次通过理论推导,提出基于多相分解技术的并行滤波结构,并对该结构的实现进行了优缺点分析,接着根据其缺点提出优化的并行滤波结构;再次通过课题应用实例,结合MATLAB仿真和FPGA仿真来验证其可行性。In this paper, firstly the realization of traditional filter structure was introduced; Secondly ,parallel fil-ter structure based on the technology of polyphase decomposition was put forward in theory, and also the ex-cellent and weakness of the structure were analysed; through the weakness analysis ,the parallel filter structure was optimized ,Lastly we use MATLAB and Quartus Ⅱ software to emulate parallel filter structure.

关 键 词：并行滤波结构 FPGA 多相分解 

分 类 号：TN713[电子电信—电路与系统]