一种结合使能控制的采样钟同步实现方法  

Realization of sampling frequency synchronization combined with enable control

作　　者：李大炜 

机构地区：[1]西安宣仁电子科技有限责任公司,陕西西安710075

出　　处：《现代电子技术》2013年第11期145-147,共3页Modern Electronics Technique

摘　　要：许多通信场景中调制信号不能完全满足过零特性,常用检测方法都不能直接应用,为了解决这个问题,采用了一种结合使能控制的采样钟同步方法。通过使能信号控制环路中的Gardner定时误差检测模块,达到环路收敛的目的。该方法既利用了通常的Gardner算法结构,具有低复杂度特性,又保证了环路可以可靠工作。在实验过程中给出了具体的工程实现流程,并通过仿真验证了该方法的有效性。In many communication occasions, modulation signal cannot fully meet the zero crossing characteristics and com- mon detecting methods cannot be directly used. In order to solve this problem, a sampling clock synchronization method combi- hated with enable control is adopted. Through Gardner timing error detection module in enable signal control loop, the loop con- vergence is achieved. This method not only uses the structure of the usual Gardner algorithm with low complexity, but also en- sures that the circuit can work reliably. The engineering implementing process was offered in the course of the experiment. The validity of the method was verified by simulation.

关 键 词：使能控制 采样钟 同步 Gardner算法结构 

分 类 号：TN911.734[电子电信—通信与信息系统]