一种高隔离度低损耗CMOS射频收发开关设计方法  

A Design technique for high isolation and low insertion loss CMOS T/R switch

作　　者：杨小峰[1] 郝跃[1] 

机构地区：[1]西安电子科技大学微电子学院宽禁带半导体材料与器件教育部重点实验室,陕西西安710071

出　　处：《电路与系统学报》2013年第2期223-227,共5页Journal of Circuits and Systems

摘　　要：本文采用了LC并联谐振的办法设计了高性能的CMOS收发开关,由于消除了CMOS晶体管的寄生电容的影响,降低了开关电路的插入损耗、提高隔离性能。同时利用直流偏置和交流浮动技术来提高开关的功率容纳能力。采用TSMC0.35 m RF-CMOS工艺设计的收发开关,模拟结果表明谐振频率工作点的插入损耗为1.03dB,收发端隔离39.277dB,输入1dB压缩点(P1dB)功率26.28dBm。LC shunt resonance technology is used to fabricate the CMOS transmit/receive switch.High isolation and low insertion loss performance are achieved with the elimination of CMOS transistor’s parasitical capacitance.DC bias voltage and AC-floating techniques are used to improve the power handling capability.The T/R Switch is based on the TSMC 0.35 μm RFCMOS process.The simulation exhibits that the insertion loss is 1.03dB,the isolation between transmit and receive access is 39.277 dB at the resonance frequency,and the input 1dB compression point（P1dB） is 26.28 dBm.

关 键 词：CMOS 收发开关 LC谐振 插入损耗 隔离度 

分 类 号：TN432[电子电信—微电子学与固体电子学]