H.264计算密集型任务在可重构处理器上的映射  

Mapping of computing-intensive tasks in H.264 decoding to a reconfigurable processor

作　　者：朱敏[1] 刘雷波[1] 尹首一[1] 杨晨[1] 王文杰[1] 魏少军[1] 

机构地区：[1]清华大学微电子所,北京100084

出　　处：《电路与系统学报》2013年第2期366-370,共5页Journal of Circuits and Systems

基　　金：863重大专项(2009AA011700);国家自然科学基金(60803018)

摘　　要：可重构系统具有领域内灵活,性能和专用电路接近的优点,是视频解码的优秀硬件方案。然而在可重构系统上进行高清实时解码还有一定的难度,其中占80%计算量的主要是IDCT(反离散余弦变换)、MC(运动补偿)、Intra-prediction(帧内预测)、deblocking(去块效率滤波)等计算密集型任务。本文基于一款粗粒度可重构处理器,提出了上述计算密集型算法的映射方案,性能优于M.Ganesan与D.Peng在2007、2009年的方案,满足H.264高清实时解码的要求。Reconfigurable system is an excellent solution for video decoding,which has shown great advantages in both flexibility and high performance,reaching a satisfactory tradeoff between GPPs（General Purpose Processors） and ASICs.But high-profile 1080p real-time decoding is still a hard work,which contains computing-intensive tasks,such as IDCT（Inverse Discrete Cosine Transform）,MC（Motion Compensation）,Intra-prediction,deblocking.These tasks take 80% complexity in H.264.This paper gives out a plan to map the tasks on a certain coarse-grade reconfigurable processor,called REMUS,achieving better results than Ganesan and D.Peng’s works.IDCT in a micro-block executes in no more than 192 cycles,intra-prediction 389 cycles,MC 320cycles and deblocking 704 cycles,met the timing requirement of H.264 1080p high profile real-time decoding at 200MHz.

关 键 词：H 264 可重构处理器 计算密集型任务 算法映射 

分 类 号：TN949.6[电子电信—信号与信息处理]