快衰落信道中交织器设计方法  

Interleaver design for the fast fading channel

作　　者：林珠[1] 刘勃[1] 归琳[1] 熊箭[1] 

机构地区：[1]上海交通大学电子信息与电气工程学院,上海200240

出　　处：《电路与系统学报》2013年第2期435-439,419,共6页Journal of Circuits and Systems

基　　金：中国国家自然科学基金(61201222);111计划(B07022);上海市数字媒体处理与传输重点实验室资助

摘　　要：本文提出一种衰落信道中交织器设计的新方法,根据衰落信道的电平交叉率和平均衰落时间估计突发差错长度,结合LDPC编码的误码曲线确定门限电平,设计相应的交织器。仿真结果验证该方法降低交织器延时,并在快衰落信道下得到较理想的系统性能。A novel interleaver design method for the fast fading channel is presented.The burst errors length is estimated by the statistical characteristics of fading channel simulation model,i.e.,the theoretic expressions of Level Crossing Rate（LCR） and Average Fading Duration（AFD）,as well as the signal level in LCR is determined by the LDPC BER performance diagram.Then the interleaver is designed based on the burst errors length.The simulation results show that this method significantly reduces the interleaver delay,and get a relatively good BER performance.

关 键 词：快衰落 RICE信道 RAYLEIGH信道 卷积交织 块交织 电平交叉率 平均衰落时间 

分 类 号：TN911.22[电子电信—通信与信息系统]