基于VTEST的TMS320C3x指令集模拟器设计  

Design of TMS320C3x instruction set simulator based on VTEST

作　　者：郭向英[1] 盛庄[1] 张西超[1] 

机构地区：[1]北京控制工程研究所,北京100190

出　　处：《计算机工程与设计》2013年第6期1973-1977,1982,共6页Computer Engineering and Design

基　　金：国家高技术研究发展计划基金项目(2011AA010105)

摘　　要：TMS320C3x指令集模拟器主要由指令集、中断和外设模块3部分组成。根据TMS320C3x指令的寻址特点,提出了双线代码指令模拟技术,该技术既能降低开发模拟程序的工作量,又能保证模拟效率;通过对中断识别机制的研究,给出了模拟器中断响应过程;设计了基于VTEST的事件驱动定时模拟方法,可降低外设模拟时对模拟器性能的影响。在实验部分,对模拟器性能进行了验证,实验结果表明了该模拟器具有较快的模拟速度。TMS320C3x instruction set simulator consists chiefly of instruction set, interrupt and peripheral modules. Aiming at instruction address teature, the double-threaded code instruction sirnulation technique is presented. This technique reduce the wok-load of developing simulation program while not reducing simulation efficiency much. Moreover, simulator＇s interruption response process is analyzed, and an event-driven mechanism is designed for timing simulation. This mechanism reduce the negative influence on simulator speed while simulating peripherals. In experiment section, simulator speed is tested, and the results show that the designed simulator has relatively high simulating speed.

关 键 词：VTEST平台 TMS320C3x指令集 模拟器 中断 外设 

分 类 号：TP311.5[自动化与计算机技术—计算机软件与理论]