一般图拓扑的电源/地线线宽优化设计  

Automatic Sizing of Power/Ground(P/G) Networks Having General Graph Topology

作　　者：李春辉[1] 范明钰[1] 庄昌文[1] 虞厥邦[1] 黄劲[2] 

机构地区：[1]电子科技大学光电子技术系,成都610054 [2]AmbowCorporation,530BerryessaRoad

出　　处：《计算机辅助设计与图形学学报》2000年第10期731-735,共5页Journal of Computer-Aided Design & Computer Graphics

基　　金：中国博士后基金资助

摘　　要：电源 /地线 (P/ G)线宽优化是高性能超大规模集成电路 (VL SI)物理设计的重要环节 .文中通过研究一般图拓扑的 P/ G线宽优化的电路模型和数学模型 ,给出了基于单个节点的线宽优化的必要条件等几个有意义的性质 ,并在此基础上提出了 P/ G线宽优化的初始构造和优化的新算法 .该算法避免了其它算法的许多冗余搜索 ,不需复杂的网络及敏感度分析 .仿真结果表明 ,该算法得到相近的优化结果所需计算时间显著减少 ,达 5 0 % .此外 ,该算法还能同时适用于树及一般图等各种拓扑结构的 P/The automatic sizing of Power/Ground (P/G) nets is one of the most critical stage in VLSI physical design. In this paper, we first give some new properties about the optimum P/G nets having general graph topology, and based on which we present an effective algorithm to find the optimum wire width of P/G nets. Our algorithm is fast by successfully avoiding the redundant search and the time consuming net analysis. Experimental results show that our algorithm is nearly 50% faster than other available algorithms, and it is universally applicable for both the tree and the general graph topology.

关 键 词：VLSI 电源 地布线 线宽优化设计 图拓扑 

分 类 号：TN470.2[电子电信—微电子学与固体电子学]