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作 者:LIU Zhen-tao LI Tao HAN Jun-gang
机构地区:[1]School of Microelectronics, Xidian University, Xi'an 710071, China [2]School of Electronic Engineering, Xi'an University of Posts and Telecommunications, Xi'an 710121, China
出 处:《Journal of Shanghai Jiaotong university(Science)》2013年第3期348-359,共12页上海交通大学学报(英文版)
基 金:Foundation item: the National Natural Science Foundation of China (No. 61136002), the Key Project of Chinese Ministry of Education (No. 211180), and the Shaanxi Provincial Industrial and Technological Project (No. 2011k06-47).
摘 要:This paper describes a dynamically reconfigurable data-flow hardware architecture optimized for the computation of image and video. It is a scalable hierarchically organized parallel architecture that consists of data-flow clusters and finite-state machine (FSM) controllers. Each cluster contains various kinds of ceils that are optimized for video processing. Furthermore, to facilitate the design process, we provide a C-like language for design specification and associated design tools. Some video applications have been implemented in the architecture to demonstrate the applicability and flexibility of the architecture. Experimental results show that the architecture, along with its video applications, can be used in many real-time video processing.This paper describes a dynamically reconfigurable data-flow hardware architecture optimized for the computation of image and video. It is a scalable hierarchically organized parallel architecture that consists of data-flow clusters and finite-state machine (FSM) controllers. Each cluster contains various kinds of cells that are optimized for video processing. Furthermore, to facilitate the design process, we provide a C-like language for design specification and associated design tools. Some video applications have been implemented in the architecture to demonstrate the applicability and flexibility of the architecture. Experimental results show that the architecture, along with its video applications, can be used in many real-time video processing.
关 键 词:dynamically reconfigurable architecture data-flow video stream processing augmented finite state machine
分 类 号:TP391[自动化与计算机技术—计算机应用技术]
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