CCD成像系统的模拟自校图形设计  

Design of analog self-check figures for CCD imaging system

作　　者：王文华[1] 张宇[1] 张柯[1] 任建岳[1] 

机构地区：[1]中国科学院长春光学精密机械与物理研究所

出　　处：《红外与激光工程》2013年第7期1933-1939,共7页Infrared and Laser Engineering

基　　金：国家863计划(863-2-5-1-13B)

摘　　要：目前航天遥感领域CCD自校图形都是数字式的,仅能在数字链路上检测FPGA逻辑模块和图像数据传输模块,而视频AD模块一直未能实现在轨检测。提出了一种"驱动芯片+数模转换芯片"的架构,搭建了易行可靠的电路,仿照CCD视频信号格式,并与CCD信号通过电容直接耦合到视频AD输入端。选用FPGA模块来产生与CCD像素时钟同频的逻辑信号,然后输出给驱动芯片EL7156。驱动芯片的低压输出取决于FPGA控制的数模转换芯片的模拟输出,高压输出不变,从而实现灰度变化。当CCD正常工作时,FPGA模块控制模拟自校图形输出为高阻状态,对CCD工作影响微乎其微。试验结果表明:模拟自校图形能与CCD视频信号互不干扰,并可与之分时送入视频AD模块,达到检测整个CCD成像系统工作状态的目的。该电路可检测多个视频AD模块,简单易行且占用很小的PCB空间,所选芯片具有航天应用可靠性。All of self-check figures are almost digital ones which can only test the FPGA component and image data transmitting component on the digital path and the video AD component is not tested because the complexity cannot satisfy the high reliability demands in space projects. A kind of circuit composed of the driving chip and the DAC chip was put forward. This circuit can generate analog signals which are similar to CCD video signals and make these signals directly couple with actual CCD signals into the input port of video AD. The key part was made up of a FPGA chip and a driver chip-EL7156. The FPGA chip generated the signals whose frequency was same as CCD video signals and then sends to the driver as logical input. The driver chip can switch low or high level according to the logical input. The low level was supplied by a DAC chip which is controlled by FPGA. When CCD circuit was working, FPGA can make the analog self-check circuit into three-state and have no effect to CCD work. Many experiments＇ results indicate that the analog self-check circuit and the CCD video circuit can work separately in different time with no interference.

关 键 词：视频AD 模拟自检 电容耦合 数模转换 FPGA 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]