基于ADIsimPLL 3.1的锁相环环路滤波器设计  

Design of PLL loop filter based on ADIsimPLL 3.1

作　　者：高立俊 

机构地区：[1]陕西烽火通信集团有限公司,陕西宝鸡721006

出　　处：《现代电子技术》2013年第15期56-58,共3页Modern Electronics Technique

摘　　要：对锁相环环路滤波器进行简单分析,对ADIsimPLL 3.1模拟软件的功能特点做了简要介绍,并利用仿真软件对一款频率合成器的环路滤波器进行仿真设计,结果表明该软件在设计应用中方便快捷,能够帮助设计出满足指标要求且性能稳定的环路滤波器。The PLL loop filter is analyzed simply. The functions and characteristics of simulation software ADIsimPLL 3.1 are introduced. In addition, ADIsimPLL 3.1 is adopted to carried out simulation design of a loop filter of frequency synthesizer. The results indicates the software have advantages in designs and applications, and can help design the loop filter with steady performances which can meet the requirements.

关 键 词：环路带宽 PLL 环路滤波器 压控灵敏度 

分 类 号：TN713.34[电子电信—电路与系统]