一种高性能固定语音识别并行处理架构  

High-performance parallel architecture for specific speech recognition

作　　者：于志华[1] 张兴明[1] 杨镇西[1] 张丽[1] 

机构地区：[1]国家数字交换系统工程技术研究中心,郑州450002

出　　处：《计算机应用研究》2013年第8期2419-2421,2446,共4页Application Research of Computers

基　　金：国家"863"计划资助项目(2011AA010603)

摘　　要：针对固定语音识别系统后端大量的模板匹配识别运算,提出了一种多处理单元并行超标量匹配处理架构,有效地提升了大容量模板库条件下实时处理性能。将所提出的并行匹配处理架构在Virtex-6 FPGA上进行了实现,其结果显示,在保证识别精度的情况下,处理能力得到显著提高。Aiming at the large quantity computation of matching and recognition in the back-end, this paper proposed a paral- lel architecture of multiple-PE（ processing element）which achieved effective real-time processing performance. The proposed architecture has been implemented on the Virtex-6 FPGA, which significantly improved the processing performance in the ease of ensuring the accuracy of recognition.

关 键 词：固定语音识别 处理单元 匹配 并行 FPGA 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]