一种新型的基于FPGA的HDB3编解码器  

A novell HDB3 codec based on FPGA

作　　者：吴泳 

机构地区：[1]湖南邮电职业技术学院移动通信系,长沙410015

出　　处：《光通信技术》2013年第8期27-29,共3页Optical Communication Technology

基　　金：湖南省教育科学规划课题(xjk012czj016)资助

摘　　要：提出了一种新型的基于FPGA的HDB3编解码器设计方案,实现了硬件电路设计和软件仿真。仿真是通过在QuartusⅡ7.2开发环境的Cyclone II系列EP2C35F672C8芯片来实现的。In this paper, a novell design of HDB3 encoder and decoder based on FPGA was proposed, and the hardware design circuit and software simulation were introduced. In the development environment of Quart-us II 7.2, the simulation was achieved through the VERILOG-HDL in EP2C35F672C8 chip of Cyclone II series.

关 键 词：数字光纤通信 三阶高密度双极性码 现场可编程门阵列 编解码器 VERILOG-高级数字设计 

分 类 号：TN911[电子电信—通信与信息系统]