一种高性能DSP中断系统的研究与设计  

Research and Design of High Performance DSP Interrupt System

作　　者：李涌[1,2] 虞致国[1] 郭良权[2] 

机构地区：[1]轻工过程先进控制教育部重点实验室,江南大学电子工程系,江苏无锡214122 [2]中国电子科技集团公司第58研究所,江苏无锡214035

出　　处：《微电子学与计算机》2013年第9期37-41,共5页Microelectronics & Computer

基　　金：中央高校基本科研业务费专项资金(JUDCF10031,JUDCF12032)

摘　　要：提出了一种高性能数字信号处理器中断系统结构,通过中断优先级的灵活可变以及系统仲裁周期的可选择性,提高中断系统的执行效率.由于中断向量表的中断服务例程的可跨越性和中断优先级分组两个特点,提高了中断优先级排列的灵活实用性.通过引入外设控制处理器来作为中断服务的提供商,增加了中断处理的途径.理论分析与仿真结果表明达到了系统中断功能的要求.A high performance digital signal processor （DSP） interrupt system has been proposed. ]By providing a flexible interrupt service request priority and an optional number of arbitration cycles, the execution efficiency of the interrupt system can be improved. Due to the two characteristics of the interrupt vector table, spanning interrupt service routines across vector entries and grouping interrupt priority, the practicability of the priority- based interrupt system is improved. By introducing the peripheral control processor （PCP） as a new interrupt service provider, an additional interrupt processing way is provided. The theoretical analysis and simulation results indicate that the requirements of the interrupt system have been satisfied.

关 键 词：中断系统 数字信号处理器 中断向量表 中断优先级 外设控制处理器 

分 类 号：TP368.1[自动化与计算机技术—计算机系统结构]