一种低功耗16bit音频Sigma-Delta调制器的设计  

Design of a Low-Power 16 bit Audio Sigma-Delta Modulator

作　　者：景新幸[1] 包远鑫[1] 胡胜[1] 

机构地区：[1]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《微电子学与计算机》2013年第9期115-118,共4页Microelectronics & Computer

基　　金：国家自然科学基金项目(60961002;61161003;61264001;61166004)

摘　　要：设计了一款工作在1.8V电源电压下、功耗仅为1.8mW、精度为16bit,优化系数(FOM)达170的音频sigma-delta调制器.其过采样率为128,采用3阶噪声整形.为了降低功耗,采用前馈结构以及单比特量化.通过采用PMOS管实现局部反馈,有效提升了调制器性能.调制器采用SMIC 0.18μm工艺实现,通过对系统结构和运算放大器、比较器等电路子模块的分析,完成整体电路和版图设计.在SS工艺角下,仿真表明本文设计的调制器性能良好,在20kHz的带宽内可达到100.8dB的信噪比(SNR),折合有效位16bits精度要求.a modulator was designed with 1. 8V supply voltage, 1. 8mW power consumption, 16bit precision and figure of merit （FOM） up to 170. Its oversampling rate is 128, using 3--order noise reshaping. The feedforward structure and one bit quantization were used to reduce power consumption. The PMOSFET was used to achieve local feedback, and improved the performance effectively. The design of the whole circuit and layout was implemented on SMIC 0. 18/~m process after analyzed the system structure and the submodules such as operational amplifier, comparator and so on. On ss comer, the simulation results show a good performance, the modulator achieved 100. 8dB signal to noise ratio （SNR） in 20kHz bandwidth, and reduced effective bits achieved 16 bits reauirement.

关 键 词：SIGMA-DELTA调制器 开关电容积分器 运算放大器 动态比较器 

分 类 号：TN710.2[电子电信—电路与系统]