基于算法状态机FPGA的空间TDICCD相机控制器  

Space TDICCD camera controller implementation using algorithmic state machine in FPGA

作　　者：李进[1,2] 金龙旭[1] 韩双丽[1] 张然峰[1] 吕曾明[1] 郝贤鹏[1] 

机构地区：[1]中国科学院长春光学精密机械与物理研究所,吉林长春130033 [2]中国科学院研究生院,北京100039

出　　处：《太赫兹科学与电子信息学报》2013年第4期650-654,共5页Journal of Terahertz Science and Electronic Information Technology

基　　金：国家863高技术研究发展计划基金资助项目(863-2-5-1-13B)

摘　　要：针对目前基于数字信号处理(DSP)的空间时间延时积分电荷耦合器件(TDICCD)相机控制器可靠性差、资源耗费和功耗大、程序重调能力差等问题,提出了一种算法状态机现场可编程门阵列(FPGA)的空间电荷耦合器件(CCD)相机控制器。控制器使用FPGA代替DSP,控制程序使用VHDL语言编写。使用自主研发的地面检测设备进行实验,实验结果表明,相机控制器可以稳定正常地工作,控制CCD拍摄的图像清晰,未发生串行现象。整个控制程序占用FPGA资源较少,占用LUTs和Block RAMs分别为38%和20%,满足空间CCD相机应用的需求。A Charge Coupled Device（CCD） camera controller based on Algorithmic State Machine （ASM） in FPGA is proposed in order to solve the problems of poor reliability, high power and hardware consumption, poor reprogram ability, etc. for space Time Delay and Integration Charge Coupled Device（TDICCD） camera controller based on DSP processor. The proposed controller takes FPGA instead of I）SP, and the controller program is written in VHDL language. The whole controlling program is implemented by ASM. The self-developed ground test equipment is employed to test the proposed camera controller. The experimental results indicate that the proposed camera controller can work stably and normally： and the image captured by CCD is very clear without being overlapped. It consumes less FPGA for the whole controlling program, and the utilization of LUTs and Block RAMs are 38% and 20%, respe^qively, which satisfies the application requirement of space camera.

关 键 词：电荷耦合器件相机控制器 现场可编程门阵列 算法状态机 

分 类 号：TN386.5[电子电信—物理电子学]