扩展型资源共享方案在RTL综合中的实现  

Implementation of expanded resource sharing in RTL synthesis

作　　者：刘贵宅[1,2] 于芳[1,2] 刘忠立[1,2] 刁岚松 吴洋[1,2] 

机构地区：[1]中国科学院微电子研究所,北京100029 [2]中国科学院大学物理学院,北京100049 [3]飘石科技有限公司,北京100029

出　　处：《深圳大学学报（理工版）》2013年第5期456-461,共6页Journal of Shenzhen University(Science and Engineering)

基　　金：武器装备预研基金资助项目(110***098)~~

摘　　要：针对现有寄存器传输级(register transfer level,RTL)综合中资源共享仅针对算术逻辑单元(arithmetic logic unit,ALU)的问题,提出扩展型资源共享的方法.该方法对所有逻辑门进行共享,既可优化ALU,又可优化普通逻辑单元,突破了资源共享基于多路选择器(multiplexer,MUX)的限制,实现算术优化及逻辑优化.实验结果与开源工具ABC比较,LUT数减少了19.2%,表明该方法不仅可减少算术逻辑单元的数目,也可有效减少普通逻辑资源的数目,最终实现面积优化.A new expanded resource sharing method was proposed to solve the issue that resource sharing is only for arithmetic logic unit （ALU） in RTL synthesis. All kinds of logic cells can be shared to optimize both ALUs and common logic cells. The restrictions of resource sharing based on multiplexer were resolved and the arithmetic and logic optimization were implemented. The results have demonstrated that the number of LUTs was reduced by 19.2% in comparison with open-source ABC. The number of common logic resources was also reduced significantly, which means the purpose of area optimization is achieved.

关 键 词：微电子学 现场可编程门阵列 资源共享 寄存器传输级 寄存器传输级综合 算术逻辑单元 面积优化 逻辑优化 

分 类 号：TN47[电子电信—微电子学与固体电子学] TP319[自动化与计算机技术—计算机软件与理论]