基于脉动阵列结构的多项式基乘法器的设计  

Implementation of a Polynomial Basis Multiplier Based on Systolic Structure

作　　者：庄建忠[1] 艾树峰[1] 

机构地区：[1]浙江传媒学院,杭州310018

出　　处：《电讯技术》2013年第8期1049-1051,共3页Telecommunication Engineering

摘　　要：提出了一类基于脉动阵列结构的字串行有限域乘法器架构。架构基于多项式基,支持m<M(M为乘法器宽度)的任意有限域GF(2m),支持任意的不可约多项式。乘法器可以按字串行输入,依据应用情景选择不同的输入字长调整阵列结构,具有良好的可扩展性。实验结果表明,架构易于实现,便于对不同字长的实现性能进行评估,适合不同的应用情景,能为不同类型的有限域乘法器提供性能比较的良好基准。A word-serial finite field multiplier architecture based on systolic structure is proposed.The architecture is based on polynomial basis and supports any finite field GF（2m） under the condition of m＆lt;M,where M denotes the width of multiplier and also supports any irreducible polynomial.The multiplier has word-serial input with good flexibility since the word width can be adjusted according to the different applications,with the extension of systolic structure.Experimental results show that the structure is easy to implement.Different performance in all kinds of occasions can be easily obtained.It is also a good performance benchmark to measure other multipliers.

关 键 词：有限域乘法器 多项式基 字串行输入 脉动阵列结构 

分 类 号：TN918.4[电子电信—通信与信息系统] TN402[电子电信—信息与通信工程]