应用于大规模ASIC的线长驱动的合法化算法  

Wire-length Driven Legalization Algorithm for Large-scale ASIC

作　　者：高文超[1,2] 周强[2] 钱旭[1] 蔡懿慈[2] 

机构地区：[1]中国矿业大学(北京)机电与信息工程学院计算机系,北京100083 [2]清华大学计算机科学与技术系,北京100084

出　　处：《计算机科学》2013年第10期18-20,共3页Computer Science

基　　金：国家自然科学基金(61176035;60833004)资助

摘　　要：总体布局完成之后的核心任务就是单元位置的合法化,即在将所有的单元安放到布局区并且与合理位置(site)对齐的同时,消除单元间的重叠。为了高效地实现大规模ASIC(Application Specific Integrated Circuit,专用集成电路)的布局过程,提出一种基于线长驱动的合法化算法。它以电路总线长为优化目标,同时考虑单元布局合理位置的约束和预布障碍。在ISPD’11和DAC’12竞赛例子上进行的测试结果表明了算法在线长保护及优化方面的效果。这些测试用例都是来源于现代工业ASIC设计的实例,由此说明了算法可以稳定有效地解决工业界中大规模ASIC多种特征电路的布局合法化问题。Legalization is core task of the detail placement after global distribution of generous cells. It removes cells overlap, aligns them to the sites and places them to their final position. A wire-length driven legalization algorithm was presented in this paper. The algorithm takes the total wire-length as objective, considers the site cOnstraint and prede- fined blockage. Experiments on ISPD＇ 11 and DAC＇ 12 benchmarks show that this legalization algorithm can get good wire-length results. These test cases are derived from modern industrial ASIC design, which also testify the algorithm can effectively solve the varying characteristics circuit layout legalization issues of large-scale ASIC.

关 键 词：布局合法化 线长驱动 大规模 集成电路 

分 类 号：TN47[电子电信—微电子学与固体电子学]