基于FPGA的数据链路误码仪设计  

The Design of Error Rate Tester Based on FPGA in Data Transmission System

作　　者：李佳[1] 陈顺方[1] 丁勇飞[1] 刘国梁[1] 

机构地区：[1]中国航空无线电电子研究所,上海200241

出　　处：《航空电子技术》2013年第3期8-11,共4页Avionics Technology

摘　　要：本文对数据链路通信系统中的误码仪进行分析设计,给出了误码率的定义,剖析了误码仪的工作原理,并分别对发射端和接收端两部分进行了描述,介绍了两种典型误码仪的工作方法,其中详细描述了阈值检测法的原理和工作模式。文中实现了发射端和接收端的FPGA设计,给出FPGA设计结论,并最终表述了在数据链路上的应用情况。In this paper, definition of Error Ratio in data transmission system is presented and principles of ERT are analysed. Both the sender and the receiver are described separately. Two kinds of work methods of Error Rate Tester are introduced. One of them is called Threshold Value Checking Method, whose principle and working mode are described particularly. The FPGA design of the sender and receiver are presented in this article. In addition, FPGA design results are elaborated and its application in data transmission system is described in the end.

关 键 词：误码率 M序列 同步 阈值 

分 类 号：TN919[电子电信—通信与信息系统]