A 55 nm CMOS ΔΣ fractional-N frequency synthesizer for WLAN transceivers with low noise filters  

作　　者：陈铭易 楚晓杰 于鹏 颜峻 石寅 

机构地区：[1]Institute of Semiconductors,Chinese Academy of Sciences

出　　处：《Journal of Semiconductors》2013年第10期83-90,共8页半导体学报（英文版）

摘　　要：A fully integrated △∑ fractional-N frequency synthesizer fabricated in a 55 nm CMOS technology is presented for the application of IEEE 802.11b/g wireless local area network （WLAN） transceivers. A low noise filter, occupying a small die area, whose power supply is given by a high PSRR and low noise LDO regulator, is integrated on chip. The proposed synthesizer needs no off-chip components and occupies an area of 0.72 mm^2excluding PAD. Measurement results show that in all channels, the phase noise of the synthesizer achieves -99 dBc/Hz and -119 dBc/Hz in band and out of band respectively with a reference frequency of 40 MHz and a loop bandwidth of 200 kHz. The integrated RMS phase error is no more than 0.6°. The proposed synthesizer consumes a total power of 15.6 mW.A fully integrated △∑ fractional-N frequency synthesizer fabricated in a 55 nm CMOS technology is presented for the application of IEEE 802.11b/g wireless local area network （WLAN） transceivers. A low noise filter, occupying a small die area, whose power supply is given by a high PSRR and low noise LDO regulator, is integrated on chip. The proposed synthesizer needs no off-chip components and occupies an area of 0.72 mm^2excluding PAD. Measurement results show that in all channels, the phase noise of the synthesizer achieves -99 dBc/Hz and -119 dBc/Hz in band and out of band respectively with a reference frequency of 40 MHz and a loop bandwidth of 200 kHz. The integrated RMS phase error is no more than 0.6°. The proposed synthesizer consumes a total power of 15.6 mW.

关 键 词：WLAN IEEE 802.11 b/g frequency synthesizer low noise filter △∑ modulator 

分 类 号：TN859[电子电信—信息与通信工程]