A multi-channel fully differential programmable integrated circuit for neural recording application  

A multi-channel fully differential programmable integrated circuit for neural recording application

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作  者:桂赟 张旭 王远 刘鸣 裴为华 梁凯 黄穗彪 李斌 陈弘达 

机构地区:[1]State Key Laboratory on Integrated Optoelectronics,Institute of Semiconductors,Chinese Academy of Sciences [2]School of Electronic and Information Engineering,South China University of Technology

出  处:《Journal of Semiconductors》2013年第10期136-143,共8页半导体学报(英文版)

基  金:supported by the National Basic Research Program of China(No.2011CB933203);the National Natural Science Foundation of China(Nos.61076023,61178051);the National High Technology Research & Development Program of China(No.2012AA030608)

摘  要:A multi-channel, fully differential programmable chip for neural recording application is presented. The integrated circuit incorporates eight neural recording amplifiers with tunable bandwidth and gain, eight 4thorder Bessel switch capacitor filters, an 8-to-1 analog time-division multiplexer, a fully differential successive approximation register analog-to-digital converter (SAR ADC), and a serial peripheral interface for communication. The neural recording amplifier presents a programmable gain from 53 dB to 68 dB, a tunable low cut-off frequency from 0.1 Hz to 300 Hz, and 3.77μVrms input-referred noise over a 5 kHz bandwidth. The SAR ADC digitizes signals at maximum sampling rate of 20 μS/s per channel and achieves an ENOB of 7.4. The integrated circuit is designed and fabricated in 0.18-μm CMOS mix-signal process. We successfully performed a multi-channel in-vivo recording experiment from a rat cortex using the neural recording chip.A multi-channel, fully differential programmable chip for neural recording application is presented. The integrated circuit incorporates eight neural recording amplifiers with tunable bandwidth and gain, eight 4thorder Bessel switch capacitor filters, an 8-to-1 analog time-division multiplexer, a fully differential successive approximation register analog-to-digital converter (SAR ADC), and a serial peripheral interface for communication. The neural recording amplifier presents a programmable gain from 53 dB to 68 dB, a tunable low cut-off frequency from 0.1 Hz to 300 Hz, and 3.77μVrms input-referred noise over a 5 kHz bandwidth. The SAR ADC digitizes signals at maximum sampling rate of 20 μS/s per channel and achieves an ENOB of 7.4. The integrated circuit is designed and fabricated in 0.18-μm CMOS mix-signal process. We successfully performed a multi-channel in-vivo recording experiment from a rat cortex using the neural recording chip.

关 键 词:neural recording system MULTI-CHANNEL PREAMPLIFIER programmable gain amplifier switch capacitorfilter time-division multiplexer SAR ADC in vivo recording 

分 类 号:TN722[电子电信—电路与系统]

 

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