非整数纠错码率modem时钟处理方法  

Clock Generating Method in the Modem with Non-integer Error Correcting Rate

作　　者：李志勇[1] 李文铎[1] 

机构地区：[1]中国电子科技集团公司第五十四研究所,河北石家庄050081

出　　处：《无线电通信技术》2013年第5期63-65,共3页Radio Communications Technology

摘　　要：长分组纠错码的业务速率与信道速率之比为奇异非整数,传统方法在modem中需使用多个用户定制的奇异频率的锁相环,针对该问题提出一种新数字时钟处理方法。仅使用一个通用的锁相环,利用数字内插器实现调制解调器中的整数倍成型/采样与非整数倍成型/采样的互相转换,适用于各种码率的Turbo码或LDPC码的长码,传统模拟电路中的多个特殊定制频率的锁相环可以省去。给出了一个典型的带通采样调制解调器实例,其中包括关键时钟的设计步骤和相关的仿真波形。Multiple custom-buih singular-frequency PLL circuits are traditionally necessary when long block error-correcting codes are introduced into the modem for that the ratio of user data rate to channel data rate is a singular non-integral number. A novel method is presented in this paper, in which the custom-built PLL circuits are replaced by only one general-purpose PLL circuit, and digital interpolators are involved to convert non-integral times shaping/sampling to integral times shaping/sampling. The method is effective to all rates of long Turbo codes or LDPC codes. An example is given in which the process of critical clocks designing and related simulation waves are shown.

关 键 词：非整数纠错码率 调制解调器 时钟生成 内插 

分 类 号：TN914[电子电信—通信与信息系统]