基于FPGA的高速AD采集设计  

High-speed AD Sampling Design Based on FPGA

作　　者：郭云飞[1] 赵冬娥[1] 张斌[1] 

机构地区：[1]中北大学电子测试技术重点实验室,仪器科学与动态测试教育部重点实验室,山西太原030051

出　　处：《山西电子技术》2013年第5期37-39,共3页Shanxi Electronic Technology

摘　　要：基于FPGA和一款高速模/数(A/D)转换芯片AD7356设计一种高速数据采集方法,给出AD7356的时序并基于PFGA程序开发软件Xilinx公司的ISE来控制AD的时序转换关系,最后通过ModelSim软件来实现对AD工作时序的仿真以及通过上位机来实现对模拟信号波形的还原,通过仿真结果证明其工作时序正确性以及硬件系统工作的正确性,能够满足高速数据采集要求。Based on PFGA and A high- speed （A/D） conversion chip AD7356, this paper designs a high -speed data acquisi- tion method, AD7356 sequence is given and based on ISE program development software of PFGA Xilinx Company to control the timing conversion relationship of the AD, and then by the ModelSim software to realize the simulation of the AD working time sequence and the reduction of analog signal waveform with the PC. Tile result proves the validity of working timing and the correctness of the hardware system, so it can satisfy the requirements of high speed data acquisition.

关 键 词：数据采集 FPGA AD7356 

分 类 号：TP30[自动化与计算机技术—计算机系统结构]