基于FPGA的帧同步器的设计与仿真  被引量:1

Design and simulation of frame synchronizers based on FPGA

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作  者:李亚[1] 代延村[1] 

机构地区:[1]中国空空导弹研究院,河南洛阳471009

出  处:《电子设计工程》2013年第20期31-33,37,共4页Electronic Design Engineering

摘  要:帧同步器在遥测接收系统中占据着十分重要作用。帧同步器的精确性直接决定遥测系统解调数据的正确性,是影响遥测系统的可靠性重要因素。首先,介绍了帧同步器的原理进行。然后,讨论了几种可以作为帧同步码组的码组。最后,对基于FPGA的帧同步器进行设计和仿真。仿真结果表明,这种帧同步器具有低复杂度、高可靠性和高灵活性等优点。Frame synchronizers play a very important role in receiver of telemetry systems. The accuracy of telemetry systems to demodulate datum depends on the precision of frame synchronizers, which is a significant factor to influence the reliability of telemetry system. Firstly, the principle of frame synchronizers is introduced in this paper. Meanwhile, several code groups which can be chosen to be of synchronization code group are discussed. At last, the design and simulation of frame synchronizers based on FPGA are presented. Simulation results show that the frame synchronizer proposed here has advantages of low reflectivity, high reliability, high flexibility and so forth.

关 键 词:帧同步器 帧同步码组 FPGA 遥测系统 

分 类 号:TN911.8[电子电信—通信与信息系统]

 

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