基于FPGA+DSP+DDS芯片的雷达信号发生器设计  

Design of Radar Signal Generator Based on FPGA + DSP + DDS Chip

作　　者：裴静静[1] 李孟华[1] 楚要钦[1] 张晓曦[1] 

机构地区：[1]中航工业西安航空计算技术研究所,陕西西安710068

出　　处：《航空计算技术》2013年第5期120-122,127,共4页Aeronautical Computing Technique

基　　金：航空科学基金项目资助(20101931004)

摘　　要：现代高科技战争对雷达系统设备的功能与性能提出了越来越高的要求,信号发生器作为雷达系统的重要组成部分也面临着更高的挑战,尤其是在体积、重量、功耗以及性能等方面要求越来越严格。分析了目前信号发生器的设计方法及其优缺点,并提出了一种基于FPGA+DSP+DDS芯片的雷达信号发生器设计方法,信号发生器具有频率分辨率高、噪声低、体积小、功耗低和控制简单等特点,且在某型产品中成功应用。Modem war with high technology requires powerful function and high performance of radar sys- tem. The design of Signal generator, a key component of the radar system is also facing more challenges, especially in terms of size, weight, power and performance. This paper analyzed the advantages and disad- vantages of current signal generators, and proposed a radar signal generator based on FPGA ＋ DSP ＋ DDS chip, This kind of signal generator has features of high frequency resolution, low Noise, small size, low power consumption and has been applied to a product successfully.

关 键 词：直接数字合成 信号发生器 FPGA DSP AD9910 

分 类 号：TN957[电子电信—信号与信息处理]