一种超椭圆曲线密码处理器并行结构设计  

A Parallel Architecture for FPGA Based Hyperelliptic Curve Cryptoprocessor

作　　者：方跃坚[1,2] 沈晴霓[2] 吴中海[1,2] 

机构地区：[1]北京大学信息科学技术学院,北京100871 [2]北京大学软件与微电子学院,北京102600

出　　处：《计算机研究与发展》2013年第11期2383-2388,共6页Journal of Computer Research and Development

基　　金：国家科技重大专项课题(2012ZX03002022);国家自然科学基金重点项目(61232005;61073156)

摘　　要：提出了一种超椭圆曲线密码处理器并行结构设计.处理器由多个具有相同结构的核组成,每个核由一个控制器、一个寄存器文件、一个运算单元组成.多个独立的核之间通过寄存器共享进行通信来协作完成复杂运算.每个运算单元执行自定义多操作数指令A(B+C)+D,并在指令产生过程和执行时对指令进行灵活配置.该设计可以实现核之间的指令级并行处理和不同指令执行阶段的流水线处理.在FPGA上的实验结果表明,与以往研究相比,该设计可以实现对超椭圆曲线密码点乘运算更高的加速.Hyperelliptic curve is an extension of elliptic curve cryptography. Shorter key lengths of hyperellitic curve cryptosystems （HECC） can be used to achieve same level of security comparing to RSA and elliptic curve cryptosystem （ECC）. A parallel architecture for field programmable gate array （FPGA） based hyperelliptic curve cryptoprocessor is designed in this paper. The processor is composed of parallel finite field （FF） cores, and each core consists of a control unit, ＇a register file and an ALU. Through sharing mechanism of register files, the independent cores can collaborate to fulfill complicated computations. Each ALU can execute customized instruction A （B q- C） q- D, and the instruction can be flexibly configured in the instruction generation and execution process. In our architecture, since every ALU is coupled with a control unit and a ROM, the ALUs are independent of each other. Any ALU can be started at any cycle, so multiple instructions can run on ALUs at the same time. The results of ALUs can be shared among the register files, so multiple ALUs can cooperate to finish complicated computations. A four stage pipeline is used to increase performance. The architecture designed can sufficiently support parallel processing and much higher speed up has been gained with the experiment results.

关 键 词：超椭圆曲线密码系统 并行结构 自定义指令 指令级并行 流水线技术 FPGA 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构] TN402[自动化与计算机技术—计算机科学与技术]