一种40次倍频器的设计  

Design of a 40^(th)-Order Frequency Multiplier

作　　者：费冲[1] 刘虹[1] 庞佑兵[1] 龙学彬[1] 

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2013年第5期646-648,652,共4页Microelectronics

摘　　要：设计了一种以阶跃恢复二极管作为核心元件的高次倍频电路。对倍频电路原理进行了分析,并对成品电路进行了测试。测试结果表明,相位噪声比理论值恶化了2dBc。使用1级阶跃倍频电路实现40次倍频,电路结构简单可靠。电路具有低附加相位噪声、低杂散、体积小等优点,可广泛应用于通信、雷达、频率合成和测量等领域。A 40th-order frequency multiplier circuit with step recovery diode multiplication was designed. Operational principle of the frequency multiplier circuit was analyzed, and test was made on the product circuit. Results showed that phase noise of the circuit deteriorated only 2 dBc, as compared to theoretical valu~ In this circuit, 1-stage step multiplier topology was used to achieve X40 frequency multiplication. Featuring low additional phase noise, low spurs and small volume, this circuit could find wide application in communication, radar, frequency synthesizer, and instrumentation.

关 键 词：高次倍频 倍频电路 频率合成 

分 类 号：TN451[电子电信—微电子学与固体电子学]