RF-LDMOS射频功率器件内匹配电路设计  

Design of Inner Matching Circuit for RF-LDMOS Power Amplifiers

作　　者：杨光林[1] 丛密芳[1] 杜寰[1] 

机构地区：[1]中国科学院微电子研究所,北京100029

出　　处：《微电子学》2013年第5期716-718,736,共4页Microelectronics

摘　　要：介绍了一种RF-LDMOS功率器件内匹配电路的设计方法。首先通过ADS/De-Embed提取管芯的S参数,得到其输入阻抗;然后建立LC内匹配电路,确定电容值、电感值以及提升的目标阻抗值;最后在HFSS中建立金丝键合线模型,确定金丝键合线的长度及根数,完成内匹配电路的设计。该内匹配电路设计的目的是将管芯的输入阻抗提升为较大的阻值,使得在PCB上进行外匹配设计更为方便。设计仿真结果表明,通过在管壳内加入合适的内匹配电路,在目标频率1.2GHz时,将管芯的输入阻抗从0.8Ω提升到12.4Ω,S11小于-46dB,符合设计要求。为LDMOS功率器件设计者提供了一种有效的内匹配设计方法。A method to design inner matching circuit for RF LDMOS power device was presented. In this technique, S parameters of the chip was extracted with ADS/De-Embed to calculate its input impedance, and an LC inner matching circuit was built and simulated to define values of capacitance and inductance, as well as target impedance, and finally, the number and the length of bond wires were defined by building bond wire model in HFSS Simulation results showed that, for a target frequency of 1. 2 GHz, the input impedance of the chip was raised from 0. 8 Ω to 12. 4 Ω and its S11 was less then -46 dB, which met the design spedficafion, by incorporating a proper inner matching circuit into the package.

关 键 词：RF-LDMOS 内匹配电路 HFSS ADS 

分 类 号：TN433[电子电信—微电子学与固体电子学]