电流舵型数模转换器的电流源梯度误差补偿  

Gradient error compensation of current sources in current-steering DAC

作　　者：汤华莲[1] 庄奕琪[1] 席望[1] 张丽[1] 

机构地区：[1]西安电子科技大学宽禁带半导体材料与器件教育部重点实验室,陕西西安710071

出　　处：《华中科技大学学报（自然科学版）》2013年第9期22-27,47,共7页Journal of Huazhong University of Science and Technology(Natural Science Edition)

基　　金：国家科技重大专项资助项目(2012ZX03001018-001);中央高校基本科研业务费专项资金资助项目(K50511250006)

摘　　要：为了降低高精度电流舵型数模转换器(DAC)中由于工艺电学梯度等原因导致的电流源失配,提出了一种基于阶梯状布局的电流源梯度误差补偿方法.该方法采用阶梯状电流源布局,以消除电流源的线性梯度误差,在此基础上设计了一种优化的电流源开关序列,用于补偿电流源的二次误差;同时将H型和树状结构应用在电流源阵列的电源布线中,消除电压梯度引入的失配误差.通过Matlab仿真对比证明该方法可有效提高DAC线性度.将此机制应用在一款12bit电流舵型DAC芯片中,其电流源阵列版图具有规整性和紧凑性的特点,芯片测试表明:此DAC的积分非线性误差小于最低有效位的9/10,微分非线性误差小于最低有效位的1/5.A gradient error compensation was proposed to reduce the mismatch errors between current sources in high resolution current-steering digital-to-analog converter （DAC）. A symmetrical step- shaped floorplan for current source was introduced to cancel the linear gradient error. Then, an im- proved switching sequence was proposed to reduce quadratic error. An H-Tree shaped power wiring was adopted to provide equal distribution of voltages to each current source. Simulation results show that this method has improved the linearity of DAC. This scheme demonstrates its effectiveness when it used to a 12 bit current-steering DAC. The layout of the current source array is uniformity and com- pact. The measured integral nonlinearity （INL） and differential nonlinearity （DNL） of the fabricated DAC are less than 9/10 and 1/5 of least significant bit respectively.

关 键 词：数模转换器 电流源 失配 梯度误差 开关 版图 

分 类 号：TN47[电子电信—微电子学与固体电子学]