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机构地区:[1]太原理工大学信息工程学院,山西太原030024
出 处:《计算机应用与软件》2013年第11期258-260,286,共4页Computer Applications and Software
摘 要:针对随机数在保密通信中的应用,设计并实现一种基于FPGA的真随机数生成器,将RS触发器的亚稳态作为随机源,减小时钟信号的相位偏移,最小化内部元件的工艺差异,从而保证输出序列的随机性,对多个触发器的输出进行异或操作并且加入后处理模块来提高随机序列的质量和增加每比特的熵。该设计在Xilinx Spartan3 XC3S400平台上实现,产生的随机序列可通过NIST测试,满足设计要求。该真随机数发生器仅由普通逻辑单元组成,能快速移植到集成电路设计流程中,缩短开发周期。Aiming at the application of random number in secure communication, we design and implement a new FPGA-based true random number generator (TRNG) in this paper. It takes the metastability of RS flip-flop as the random source to reduce the phase shift of clock signal and minimises the process differences of internal components so as to guarantee the randomness of output sequence. The outputs of multi-triggers are conducted the XOR operations and are added the post-processing module for enhancing the quality of random sequences and increasing the entropy per bit. This design has been implemented on Xilinx Spartan3 XC3S400 platform, the random sequence generated can pass the NIST test, and all the indexes meet the design requirements. The true random number generator consists of common logic unites only, it can be quickly transplanted into ASIC design and shorten the development cycle.
关 键 词:真随机数发生器 现场可编程门阵列 查找表 亚稳态 触发器 后处理
分 类 号:TP309[自动化与计算机技术—计算机系统结构]
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