高速高阻抗模拟电路的印制电路板设计  

PCB Design for High Speed High Impedance Analog Circuit

作　　者：张淑艳[1] 朱娟[1] 王超[1] 肖萍萍[1] 王金莉[1] 田纪亚[1] 李晓光[1] 

机构地区：[1]长春大学光华学院,长春130033

出　　处：《计算机测量与控制》2013年第11期3096-3097,3127,共3页Computer Measurement &Control

基　　金：吉林省教育厅"十二五"科学技术研究项目(2013574;2011450)

摘　　要：为了保证高速模拟电路的带宽,必须尽量减小寄生电容;对印制电路板的寄生参数分别从集总参数电路理论和传输线理论进行了建模和分析;根据分析结果,采用去除地平面的方法,对高速高阻抗模拟电路的印制电路板进行了设计;实验结果表明,当电路输出阻抗不超过200Ω时,输入为100MHz的脉冲时,通过特性阻抗匹配,可以保证信号质量和电路带宽;当电路输出阻抗很高时,则必须缩短走线的长度来降低寄生电容的大小以保证电路的带宽。In order to guarantee the bandwidth of the analog circuit the parasitic capacitance must be reduced. The paramtlc problem is modeled and analyzed using the methods of lumped circuit theory and transmission line theory. According to analyzed results the PCB of high speed high impedance analog circuit is designed with the method of removing the ground plane. Experimental results show that if the output impedance is not large than 200 ohms, for 100MHz pulse input the signal quality and circuit bandwidth can he guaranteed through character istic impedance match; while the output impedance is large enough the circuit bandwidth must be guaranteed through shorten the route of the PCB to reduce the parasitic capacitance further.

关 键 词：高速 高阻抗 模拟电路 印制电路板 

分 类 号：TN709[电子电信—电路与系统]