基于低压差分信号(LVDS)总线的数字信号源设计与实现  

Design of the Digital Signal Source Based on LVDS

作　　者：侯利民[1] 苏淑靖[1] 

机构地区：[1]中北大学电子测试技术国家重点实验室,太原030051

出　　处：《科学技术与工程》2013年第32期9714-9718,共5页Science Technology and Engineering

基　　金：国家自然科学基金项目(51075375)资助

摘　　要：针对如何实现高速数据传输的问题,设计了基于LVDS总线的数字信号源。LVDS是一种高速传输技术,利用低压差分信号进行数据传输,具有低功耗、低误码率、低串扰和低辐射的特点。设计以FPGA作为控制核心,并以DS92LV18实现LVDS信号的传输。试验表明采用LVDS技术作为功能卡之间的数据传输方式,可以很好地实现卡之间的高速数据传输。该信号源可实现输出PCM数字信号,输出的信号由上位机软件设定。Aiming at the problem how to achieve high-speed data transmission, a digital signal source based on LVDS bus is designed. LVDS is a high-speed transmission technology that uses low-voltage differential signal for data transmission with characteristics of low power consumption, low error rate, low crosstalk and low radiation. The design uses FPGA as the control core, and DS92LV18 to achieve LVDS signal transmission. Experimental re- suits show that using LVDS technology as way of the data transmission between the function cards, the high-speed data transmission between the cards can achieve well. The signal source can output PCM digital signals, and the code rate of signals can be set through the PC software by the users.

关 键 词：LVDS 信号源 FPGA 数据传输 PCM 

分 类 号：TN919.2[电子电信—通信与信息系统]