一种设计同步时序逻辑电路的新方法  

A New Method of Designing Synchronous Sequential Logic Circuits

作　　者：史庆军[1] 

机构地区：[1]佳木斯大学,佳木斯154007

出　　处：《电子工程师》2000年第11期46-47,共2页Electronic Engineer

摘　　要：提出了一种设计同步时序逻辑电路的新方法。根据触发器 (FF)基本特性 ,可从电路的状态转换图上直接求得触发器置位、复位函数 ,进而确定触发器的激励方程。具体设计实例表明该方法简捷、高效 。A new method of designing synchronous sequential logic circuits is propsed. Based on flip flop′s property, the set and reset functions can be acquired directly from the circuit′s state transition diagram, so the excitation equations of FF are defined. An example designed using this method confirms its simplification and efficiency and the designed circuit is correct.

关 键 词：同步时序电路 状态转换图 逻辑电路 电路设计 

分 类 号：TN791.02[电子电信—电路与系统]