基于FPGA的DDS函数信号发生器设计  

FPGA and DDS-based Function-signal-generator Design

作　　者：高鹏[1] 秦文华[1] 李得东 李梦[1] 

机构地区：[1]曲阜师范大学物理工程学院

出　　处：《电子技术（上海）》2013年第11期22-25,21,共5页Electronic Technology

摘　　要：函数信号发生器在电路实验和设备检测中具有十分广泛的用途。本设计应用Altera公司的Cyclone II系列芯片基于Nios II嵌入式处理器的SOPC技术,设计完成了双踪函数信号发生器系统。本设计基于DDS原理,结合Nios软核作为外围和数据控制器,同时较全面地利用Quartus和Nios IDE的设计方法,使单片FPGA芯片实现高精度、高频率的双通道各信号源的产生。仿真结果表明,本函数信号发生器频率及相位可灵活调整且分辨率高,能够实现频率及相位的快速切换。Function signal generator is widely used in circuit experiment and test equipment. The present design uses Altera＇s Nios II Cyclone II series chip embedded processor based on SOPC technology to design and complete a double track function signal generator system. The design is based on DDS principle and combined with Nios soft core as peripheral and data controller, at the same time fully utilizes Quartus and Nios IDE method to make the FPGA chip realize the high precision and high frequency generation of each signal source of the double channels. The simulation results show that the present function-signal-generator＇s frequency and phase can be adjusted flexibly with high resolution, and the fast switching of frequency and phase can be realized.

关 键 词：现场可编程逻辑器件 直接数字频率合成 函数信号发生器 

分 类 号：TN911.6[电子电信—通信与信息系统]