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机构地区:[1]State Key Laboratory of Particle Detection and Electronics, University of Science and Technology of China [2]Department of Modern Physics, University of Science and Technology of China
出 处:《Chinese Physics C》2013年第12期71-77,共7页中国物理C(英文版)
基 金:Supported by Knowledge Innovation Program of Chinese Academy of Sciences(KJCX2-YW-N27);National Natural Science Foundation of China(11175174,11005107)
摘 要:The Large Area Water Cherenkov Array (LAWCA) experiment focuses on high energy gamma astronomy between 100 GeV and 30 TeV. Invoked by the idea of hardware triggerless structure, a prototype of LAWCA trigger electronics is implemented in one single VME-9U module which obtains all the data from the 100 Front End Electronic (FEE) endpoints. Since the trigger electronics accumulate all the information, the flexibility of trigger processing can be improved. Meanwhile, the dedicated hardware trigger signals which are fed back to front end are eliminated; this leads to a system with better simplicity and stability. To accommodate the 5.4 Gbps system average data rate, the fiber based high speed serial data transmission is adopted. Based on the logic design in one single FPGA device, real-time trigger processing is achieved; the reprogrammable feature of the FPGA device renders a reconfigurable structure of trigger electronics. Simulation and initial testing results indicate that the trigger electronics prototype functions well.The Large Area Water Cherenkov Array (LAWCA) experiment focuses on high energy gamma astronomy between 100 GeV and 30 TeV. Invoked by the idea of hardware triggerless structure, a prototype of LAWCA trigger electronics is implemented in one single VME-9U module which obtains all the data from the 100 Front End Electronic (FEE) endpoints. Since the trigger electronics accumulate all the information, the flexibility of trigger processing can be improved. Meanwhile, the dedicated hardware trigger signals which are fed back to front end are eliminated; this leads to a system with better simplicity and stability. To accommodate the 5.4 Gbps system average data rate, the fiber based high speed serial data transmission is adopted. Based on the logic design in one single FPGA device, real-time trigger processing is achieved; the reprogrammable feature of the FPGA device renders a reconfigurable structure of trigger electronics. Simulation and initial testing results indicate that the trigger electronics prototype functions well.
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