面向推断执行处理器的Trace压缩方法  

A Trace Compression Approach for Predicative Execution Processor

作　　者：高瑛珂[1,2] 王琪[1,2] 李泉泉[1,2] 张铁军[1] 王东辉[1] 侯朝焕[1] 

机构地区：[1]中国科学院声学研究所数字系统集成实验室,北京100190 [2]中国科学院大学,北京100049

出　　处：《计算机辅助设计与图形学学报》2013年第12期1918-1924,共7页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家"核高基"科技重大专项(2009zx01034-001-002-005);国家"九七三"重点基础研究发展计划项目(2009CB320202)

摘　　要：实时收集应用程序在处理器中的trace信息对于硅后验证和软件调试具有重要意义.受限于处理器片上存储资源和通信带宽,为了提高trace信息的压缩效率以进行实时调试,提出一种面向推断执行处理器的实时trace压缩方法.该方法充分利用推断位和程序计数器(PC)的冗余特性,分别采用两级压缩后输出,保证了PC值的局部性和整个trace信息的完整性.在SuperV DSP中进行验证的结果表明,文中方法比传统方法的压缩率平均提高21.95%,可以更好地满足推断执行处理器的实时调试需求.Collecting the program execution traces in real time is essential to both the post-silicon verification and software debugging. Limited by on-chip storage resource and communication bandwidth supplied by processor, a trace compression approach is proposed for predicative execution processor in order to improving compression ratio. The predicative bits and program counters are compressed through two stages respectively by considering the redundant features of them so that the locality of PC and the integrity of whole trace are held. With SuperV DSP as the research prototype, in comparison with traditional approach, the average compression radio is increased by 21. 95%. The real-time debugging requirements could be well met by adopting this approach.

关 键 词：推断执行 trace压缩 SuperV处理器 

分 类 号：TP368[自动化与计算机技术—计算机系统结构]