Very-Low-Voltage and Cross-Submicron-Technology Passive Tag＇s Logic Design  

作　　者：SHI Weiwei CHOY Chiusing 

机构地区：[1]College of Information Engineering, Shenzhen University and Shenzhen Key Laboratory of Modern Communication and Information Processing, Shenzhen 518000, China [2]Department of Electronic Engineering, Chinese University of Hong Kong, Hong Kong, China

出　　处：《Chinese Journal of Electronics》2013年第4期661-665,共5页电子学报（英文版）

摘　　要：A low-voltage wide-tolerance-range passive UHF RFID tag＇s baseband logic design is presented in this paper. Based on deep submicron CMOS technologies, the design utilizes tailored techniques to satisfy subthreshold operation： to deal with the specific timing and wide-range- variation problems at very low power supply, and for the consideration of limited availability of RF power. Compen- sated addition is proposed for the PIE decoder, and power- aware scheme is applied to the entire logic part. Galoi Lin- ear feedback shift register （LFSR） and one-hot counter are also applied to fulfill critical timing requirements. Addi- tionally, these techniques help to improve clock efficiency and reduce the frequency variation impact in low-voltage data link portions. Therefore the robustness in subthresh- old operation is ensured. The logic design was fabricated in 180nm- 130nm and 90nm CMOS technologies respectively to verify the compatibility. In measurement the designs in- dicate competent subthreshold operation. The 90rim ver- sion can function at 0.33V.

关 键 词：Low voltage Subthreshold logic Radio frequency identification （RFID）. 

分 类 号：TN722.77[电子电信—电路与系统] TP391.4[自动化与计算机技术—计算机应用技术]