星载低复杂度Turbo译码器的实现技术研究  

Implementation of Turbo Decoder with Reduced Complexity for Spacecraft

作　　者：张芪[1] 王永庆[1] 刘东磊[1] 

机构地区：[1]北京理工大学信息与电子学院,北京100081

出　　处：《宇航学报》2013年第12期1621-1627,共7页Journal of Astronautics

基　　金：国家高技术研究发展计划(863计划)(2011AA1569)

摘　　要：针对航天测控通信系统中微弱信号处理的实际应用需求,研究了Turbo译码算法在星载平台上的低复杂度实现技术。基于折线近似的Log_MAP算法,提出了一种新的基于FPGA的译码器实现方案,一方面简化了迭代译码过程中分支度量的计算存储方法,有效减少了存储容量及算法复杂度;另一方面采用半并行化及流水的数据处理方式,提高了译码处理速度。利用CCSDS标准建议的交织器和生成矩阵进行了仿真和实测,结果表明相较于其它结构,采用本文设计方案实现的Turbo译码器在Slice资源没有增加的条件下存储复杂度降低了29.6%,且在输出误码率<10-6时编码增益达到了9.9dB,保持了良好的译码性能。本文译码器已成功应用于某航天型号工程。Aiming at practical requirements for the received sharply-attenuated weak signal process in space TT＆C communication system, an implementation technique of low-complexity Turbo decoder for spacecraft is studied. A modified Turbo decoder structure implemented on FPGA is presented by adopting the Log-MAP algorithm based on approximation by broken line. First, much computation in branch metric of iterative decoding is simplified to save storage resources. Next, a semi-parallel processing is proposed to optimize the whole hardware architecture and raise decoding rate. Through the interleaver and generator matrix recommend by CCSDS, simulation and measured results show that storage process complexity is cut by 29.6% without more slice resources and the coding gain reaches 9.9dB at the BER of 10-6. This decoder has been successfully applied to an aerospace engineering.

关 键 词：航天测控通信 TURBO 低复杂度 半并行化结构 

分 类 号：TN911.22[电子电信—通信与信息系统]