QPSK调制/解调电路的verilog HDL模型与功能仿真  

The Verilog HDL Model and Function Simulation of QPSK Modulation/Demodulation Circuits

作　　者：房利[1] 张荣芬[1] 李良荣[1] 

机构地区：[1]贵州大学电子信息学院,贵州贵阳550025

出　　处：《贵州大学学报（自然科学版）》2013年第6期81-84,共4页Journal of Guizhou University:Natural Sciences

摘　　要：本文介绍了QPSK(四相移键控)数字调制/解调技术的原理,建立了一种基于高速硬件描述语言(verilog HDL)的数字式QPSK调制/解调模型,并应用FPGA硬件平台实现了相关的电路设计,给出了基于新一代专业仿真环境Modelsim_ase的系统仿真过程及结果分析。The four phase shift keying （QPSK） based on a high speed hardware description modulation and demodulation principle were introduced and language （verilog HDL）, a QPSK digital modulation/demodulation model was proposed. Then, the related circuits were realized using FPGA platform and the simulation results of the designs were implemented successfully through Modelsim_ase professional simulation tool.

关 键 词：QPSK FPGA 调制 解调 

分 类 号：TN914.2[电子电信—通信与信息系统]