基于SRIO的FPGA间数据交互系统设计与应用  

Design and application of data interaction system between FPGAs based on SRIO

作　　者：张德民[1] 李明[1] 李杨[1] 邱智慧[1] 

机构地区：[1]重庆邮电大学移动通信技术重庆市重点实验室,重庆400065

出　　处：《重庆邮电大学学报（自然科学版）》2013年第6期738-742,共5页Journal of Chongqing University of Posts and Telecommunications(Natural Science Edition)

基　　金：国家科技重大专项(2011ZX03001-003-01)~~

摘　　要：基于时分长期演进(time division-long term evolution,TD-LTE)射频一致性测试系统中数据交互的分析研究,为了很好地满足现场可编程门阵列(field programmable gate array,FPGA)间的大容量数据交互,设计了一种高速的嵌入式技术串行高速输入输出口(serial rapid IO,SRIO),实现2块FPGA芯片间的互连,保证在TD-LTE系统中上行和下行数据处理的独立性和交互的便捷。基于Xilinx公司的Virtex-6系列XC6VLX475T芯片,给出了SRIO接口的整体性设计方案,经过ModelSim软件仿真,确定适合项目需要的数据交互的格式类型和事务类型,对接口代码进行综合、板级验证、联机调试等,在ChipScope软件上对比分析数据传输的正确性,通过测试模块统计比较发送和接收信号的误比特率,确定了SRIO接口在高速数据传输的稳定性和可靠性,成功验证了SRIO接口在FPGA之间数据的互连互通,并将该方案作为一种新的总线技术应用于TD-LTE射频一致性测试仪系统开发中。Based on the research and analysis of data interaction in the TD-LTE （time division-long term evolution） wire- less comprehensive test instrument, to meet the high-capacity data interaction between FPGA （field programmable gate ar- ray） and FPGA, this paper introduces a high-speed embedded technology SRIO（ serial rapidIO）, to achieve the intereon- nection between the two pieces of FPGA chip, to guarantee independence of data processing and interaction of convenient in TD-LTE uplink and downlink. Based on Xilinx company XC6VLX475T chips of Virtex-6 series, an overall design scheme of SRIO interface is given in this paper. Through simulation of ModelSim we can identify the format types and transaction types of the data interaction that appropriate project. After making synthesis, PCB board verifying and on-line debugging the correctness of data transmission is shown in the ChipScope software. Test module can get the bit error rate of signal be- tween sending and receiving by statistical comparing them. It is with stability and reliability in high speed data transmission over SRIO interface. There are many good performances of SRIO interconnection between FPGAs. And this design was ap- plied to TD-LTE wireless comprehensive test instrument as a new bus technology.

关 键 词：时分长期演进(TD—LTE) 串行高速输入输出口(SRIO) 现场可编程门阵列(FPGA) 数据交互 数字信号处 理fDSP) 

分 类 号：TN492[电子电信—微电子学与固体电子学]