像增强器程控电路设计  

Design of a Program Control Circuit of a Gated Image Intensifier

作　　者：宋岩[1] 杜继业[1] 宋顾周[1] 马继明[1] 岳志勤[1] 韩长材[1] 段宝军[1] 周鸣[1] 姚志明[1] 

机构地区：[1]西北核技术研究所强脉冲辐射环境模拟与效应国家重点实验室,西安710024

出　　处：《现代应用物理》2013年第4期356-360,共5页Modern Applied Physics

基　　金：国家自然科学基金资助项目(No.61171013)

摘　　要：使用像增强型电荷耦合器件(intensified charge coupled device,ICCD)相机系统时,需要对像增强器的选通时刻、选通宽度以及增益大小进行控制。将现场可编程逻辑门阵列(field programmable gate array,FPGA)和专业数字延时芯片AD9501配合使用,可以产生延时和脉宽均可大动态范围、高分辨数字调节的脉冲,同时保证延时精度,从而精确控制像增强器的选通时刻和选通宽度;利用FPGA控制数字电位器MCP42010,调节像增强器微通道板两端高压,可实现对像增强器增益的控制;采用RS485总线方式完成上位计算机与FPGA的远程通信,可实现程控功能。程控电路输出的选通脉冲,其延时动态范围为110ns^4.3ms,脉宽动态范围为0~4.3ms,分辨率均为65ps,脉冲延时抖动的均方根不大于147ps;实现了256挡位的增益调节。The parameters of image intensifiers should be controlled for use in intensified CCD （IC- CD） cameras, including gate delay, gate width and gain. A digital delay generator of high precision with a large dynamic range and a high resolution is achieved by using FPGA combined with AD9501. The digital delay generator determines the gate delay and the gate width. The gain of im- age intensifier is adjusted by high voltage microehannel plate. The high voltage module is controlled by the digital potentiometer MCP42010, and the digital potentiometer is controlled according to the order from FPGA. The program control circuit communicates with computer through RS485. The dynamic range of the digital delay is 110 ns^4.3 ms, the pulse width 0~4.3 ms, and their resolu- tion 65 ps. The root mean square of jitter of the digital delay is no more than 147 ps. The gain of image intensifier can be adjusted in 256 levels.

关 键 词：像增强器 选通控制 增益控制 ICCD FPGA AD9501 MCP42010 

分 类 号：TN223[电子电信—物理电子学] TP2[自动化与计算机技术—检测技术与自动化装置]